| activation record : |
Values of the parameters, local variables and return address of a procedure call |
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| address : |
A number that identifies a memory location |
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| address bus : |
The set of electrical pathways for address signals |
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| assembler : |
A program that translates an assembly language program into machine language. bus |
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| bus : |
A set of wires or connections connecting the CPU, memory, and I/O ports |
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| Clock cycle : |
Fundamental time unit of a computer. Every operation executed by the computer takes at least one and possibly multiple cycles. Typically, the clock cycle is now in the order of one to a few nanoseconds. |
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| Clock frequency : |
Reciproke of the clock cycle: the number of cycles per second expressed in Hertz (Hz). Typical clock frequencies nowadays are 400 MHz--1 GHz. |
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| Clock period : |
The time interval between two clock pulses |
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| clock rate : |
The number of clock pulses per second, measured in megahertz (MHz) |
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| control bus : |
The set of electrical paths for control signals |
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| Control processor : |
The processor in a processor array machine that issues the instructions to be executed by all the processors in the processor array. Alternatively, the control processor may perform tasks in which the processors in the array are not involved, e.g., I/O operations or serial operations. |
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| data bus : |
The set of electrical paths for data signals |
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| handshaking : |
A protocol for devices to communicate with each other |
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| I/O devices : |
Devices that handle input and output data of the computer; typical I/O devices are display monitor, disk drive and printer |
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| I/O ports : |
Circuits that function as transfer points between the CPU and I/O devices |
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| instruction pointer, IP : |
A CPU register that contains the address of the next instruction |
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| instruction set : |
The instructions the CPU is capable of performing |
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| mask : |
A bit pattern used in logical operations to clear, set or test specific bits in an operand |
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| multiprocessing : |
A mode of operation in which two or more connected and roughly equal processing units each carry out one or more processes (programs or sets of instructions) in tandem. In multiprocessing, each processing unit works on a different set of instructions or on different parts of the same process. |
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| multitasking : |
The ability of a computer to execute several programs at the same time |
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| object file : |
The machine language file created by the assembler from the source program file |
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| opcode : |
Numeric or symbolic code denoting the type of operation for an instruction |
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| operand : |
The data specified in an instruction |
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| parallel processing : |
A method of processing that can run only on a type of computer containing two or more processors running simultaneously. Parallel processing differs from multiprocessing in the way a task is distributed over the available processors. In multiprocessing, a process might be divided up into sequential blocks, with one processor managing access to a database, another analyzing the data, and a third handling graphical output to the screen. Programmers working with systems that perform parallel processing must find ways to divide a task so that it is more or less evenly distributed among the processors available. |
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| pipelining : |
In parallel processing, a method in which instructions are passed from one processing unit to another, as on an assembly line, and each unit is specialized for performing a particular type of operation. |
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| RISC : |
Reduced Instruction Set Computer. A CPU with its instruction set that is sijmpler in comparison with the earlier Complex Instruction Set Computers (CISCs) The instruction set was reduced to simple instructions that ideally should execute in one cycle. |
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| Shared Memory : |
Memory configuration of a computer in which all processors have direct access to all the memory in the system. Because of technological limitations on shared bandwidth generally not more than about 16 processors share a common memory. |
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| simulator : |
One that simulates, especially an apparatus that generates test conditions |
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| source operand : |
Second operand in an instruction usually not changed by the instruction |
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| VLIW : |
Very Large Instruction Word processing. The use of large instruction words to keep many functional units busy in parallel. The scheduling of instructions is done statically by the compiler and, as such, requires high quality code generation by that compiler |
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